This invention relates to semiconductor devices, and more particularly, to a field effect transistor.
Integrated circuit technology has developed a wide variety of devices having specialized characteristics, which may be fabricated on single chips with high packing densities. Among such specialized devices are permeable base transistors (PBT) for use in discrete and microwave integrated circuits. As set forth in U.S. Pat. No. 4,378,629, a permeable base transistor includes a single crystal semiconductor substrate forming a first emitter or collector, a Schottky-barrier metallic base layer overlying the substrate and having slits therethrough (so that the remaining metallic layer resembles "fingers" extending into the semiconductor material), and an epitaxial semiconductor single crystal filling the slits and overlying the base layer, thereby forming a second collector or emitter contact. In operation, when a voltage is applied between the emitter and collector contacts, current flow through the transistor is limited by application of a voltage to an external contact of the metal base layer.
The performance of permeable base transistors is limited by high internal capacitance and geometrical restrictions imposed to control such capacitance. More specifically, to prevent the depletion capacitance from seriously affecting performance, the lateral gate width (i.e., the width of each finger) must be kept less than the lateral channel width (i.e., the spacing between the fingers). The optimum channel width may be as small as about 0.08 micrometers, limiting the gate width to about this same value. A greatly decreased gate width may in turn result in reduced high speed device performance because of increased resistivity between the gate metal and its external contact. That is, the fine size of the "lead" to the gate metal may limit the rate at which the voltage in the gate may be varied.
Thus, while permeable base transistors offer significant promise as microwave transistors, this promise has not been realized because of internal parasitic capacitance and resistance problems. There has been proposed no approach for achieving improved performance, either with a newly conceived device or by improving upon existing permeable base transistor technology. Accordingly, there exists a need for obtaining improved high-frequency performance of a gated semiconductor device, while simultaneously allowing further size reduction so as to permit higher packing densisties of devices in chips. The present invention fulfills this need, and further provides related advantages.